Monday, April 17, 2017

C-DOT - Delhi Technological University, Delhi, August 29,2016

C-DOT - Delhi Technological University, Delhi, August 29,2016


Interview Experience.

Shortlisting was done on the basis of percentage. Total 30 student of ECE 
were shortlisted for the interview. There was no written test, only one 
interview round was there.

They asked about my favorite subject & then they start asking qsns from that 
topic. I told them Digital Electronics, VLSI as my favorite subjects.

They asked me the definition of VLSI (not the full form).

Then they asked me the dimensions currently used in MOSFET, Transistor 
design.
Intel latest processor & its speed?
Solve Logic circuit?
FSM?
MEALY & MOORE Model of FSM?
Set Up & Hold Time?
Propagation delay?
K-Map advantages?
Why do we use Gray coding in K-Map?

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